DocumentCode
3613227
Title
A wear-leveling algorithm exploiting k-bitwise operations for flash storage devices
Author
Kim, Bo-kyeong ; Lee, Dong-Ho
Author_Institution
Department of Computer Science and Engineering, Hanyang University, Korea
Volume
61
Issue
4
fYear
2015
fDate
11/1/2015 12:00:00 AM
Firstpage
470
Lastpage
477
Abstract
Flash storage devices are widely used for mobile consumer electronics due to small size, low power consumption, and high performance. Generally, the flash storage device consists of NAND flash memories. Compared to traditional magnetic disks, NAND flash memory requires an additional erase operation and its blocks have limited erase cycles. For extending its endurance, various wearleveling algorithms have been proposed. However, they invoke many read/write/erase operations and use many memory resources for managing their block states because they do not consider the property of the flash translation layer. To solve these problems, a new wear-leveling algorithm for the log-based flash translation layer is proposed in this paper. In the log-based flash translation layer, since log blocks are frequently updated and erased, the cold block rarely removed is reserved for a next log block so that all the blocks are evenly erased. In addition, the proposed algorithm reduces the usage of memory resources by exploiting k-bitwise erase table that only needs small k-bit erase flags for managing its block erase state. Through various experiments with related wear-leveling algorithms, this paper shows the superiority of the proposed wear-leveling algorithm.
Keywords
Classification algorithms; Computer science; Consumer electronics; Flash memories; Memory management; Mobile communication; Performance evaluation; Flash Translation Layer; FlashStorage Device; NAND Flash Memory; Wear-leveling;
fLanguage
English
Journal_Title
Consumer Electronics, IEEE Transactions on
Publisher
ieee
ISSN
0098-3063
Type
jour
DOI
10.1109/TCE.2015.7389801
Filename
7389801
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