DocumentCode
3613384
Title
Design, implementation and comparison of three general-purpose neurons
Author
S. Coric;I. Latinovic;A. Pavasovic
Author_Institution
Northeastern Univ., Boston, MA, USA
Volume
2
fYear
2002
fDate
6/24/1905 12:00:00 AM
Firstpage
601
Abstract
FPGA hardware implementation of three neurons is described, and their performances compared, mainly in the domain of speed and complexity.
Keywords
"Neurons","Field programmable gate arrays","Backpropagation algorithms","Neural network hardware","Neural networks","Algorithm design and analysis","Logistics","Read only memory"
Publisher
ieee
Conference_Titel
Microelectronics, 2002. MIEL 2002. 23rd International Conference on
Print_ISBN
0-7803-7235-2
Type
conf
DOI
10.1109/MIEL.2002.1003329
Filename
1003329
Link To Document