DocumentCode
3613386
Title
Optimizing AT/sup 2/ measure of hexagonal systolic arrays
Author
E.I. Milovanovic;N.M. Stojanovic;I.Z. Milovanovic;T.I. Tokic;M.K. Stojcev
Author_Institution
Fac. of Electron. Eng., Nis Univ., Serbia
Volume
2
fYear
2002
fDate
6/24/1905 12:00:00 AM
Firstpage
629
Abstract
The major features of adopting systolic arrays (SA) for special purpose processing architectures are: simple and regular design, concurrency in communications, and balancing computation with the I/O. In this paper we synthesize a family of hexagonal arrays, SA(r), that implement matrix multiplication. We have observed that the execution time of a hexagonal array, which has a minimal number of processing elements (PE) for a given problem size, can be reduced if the number of PEs is increased. Since the execution time and the number of PEs are the two most important performance measures of the systolic array, we take their product AT/sup 2/, AT/sup 2/=/spl Omega//sub r/(n)T/sub exe//sup 2/, to compare the arrays from this family. With respect to this performance measure, the best array is obtained for r=[n/2], where n is a dimension of square matrices while r indicates the extension, in terms of rows, of the array that has minimal number of processing elements for a given problem size.
Keywords
"Systolic arrays","Transmission line matrix methods","Hardware","Time measurement","Size measurement","Application software","Costs","Signal processing","Image processing","Parallel architectures"
Publisher
ieee
Conference_Titel
Microelectronics, 2002. MIEL 2002. 23rd International Conference on
Print_ISBN
0-7803-7235-2
Type
conf
DOI
10.1109/MIEL.2002.1003336
Filename
1003336
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