Minimization of sidewall roughness in Si pillar-like structures by photolithography optimization

The sidewall roughness of silicon pillar-like structures degrades the characteristics of both optical MEMS and MOS or bipolar electron device applications. The silicon pillar sidewall roughness comes from the photoresist edge roughness caused by the polymer chains entangled in aggregates, which has a higher density than the surrounding polymer and hence the lower development rate. Therefore, the photolithography optimization of AZ 5214 photoresist is carried out in order to achieve minimal sidewall roughness. The steps that influence the roughness most are: sample preparation and handling procedures, photoresist thickness, hardbake temperature and O/sub 2/ plasma descum. The silicon sample is cleaned and handled in a way to minimize the particle contamination on the surface since exposure is done in contact mode and any kind of particles would increase the gap between the mask and sample causing a lateral distribution under the mask patterns due to the diffraction effect. Photoresist is spun on the sample to achieve smaller thickness to minimize the light diffraction inside the photoresist. During hardbake, photoresist reflows and the edge roughness is reduced. The optimum temperature is 150/spl deg/C. By applying O/sub 2/ plasma descum, the edge roughness is reduced due to the isotropic nature of the process.