Concurrent operation scheduling and unit allocation with an evolutionary technique

This paper presents a method with an evolutionary approach to some of the tasks of integrated-circuit (IC) design. The work is focused on application-specific integrated circuits (ASICs) that need an even more sophisticated design (in terms of size and speed) due to their specific use. The main part of the paper consists of an improved method for the evolutionary search for the optimal design of ICs. The approach considers scheduling and allocation constraints and ensures a globally optimal solution in a reasonable time. The algorithm was evaluated with the group of test-bench ICs, which differ in size and the number of operation types. The results show that the evolutionary method is able to find a solution that is appropriate in terms of all the considered and important parameters.