DocumentCode
3614857
Title
Deterministic test generation for digital circuits by cellular automata in a Java applet
Author
T. Pikula;E. Gramatova;M. Fischerova
Author_Institution
Inst. of Informatics, Slovak Acad. of Sci., Bratislava, Slovakia
Volume
2
fYear
2003
fDate
6/25/1905 12:00:00 AM
Firstpage
40
Abstract
The paper presents implementation of a test pattern generation algorithm that uses cellular automata with bit flipping to generate a pre-computed test set. The algorithm is realized as a Java applet for automatic synthesis of the built-in self-test structure into a digital circuit modeled in VHDL using only its VHDL entity. This software tool is available on the Internet.
Keywords
"Circuit testing","Automatic testing","Digital circuits","Java","Test pattern generators","Automatic test pattern generation","Circuit synthesis","Built-in self-test","Software tools","Internet"
Publisher
ieee
Conference_Titel
EUROCON 2003. Computer as a Tool. The IEEE Region 8
Print_ISBN
0-7803-7763-X
Type
conf
DOI
10.1109/EURCON.2003.1248141
Filename
1248141
Link To Document