مرکز منطقه ای اطلاع رساني علوم و فناوري

DocumentCode :

3615183

Title :

Interconnect modeling

Author :

J. Davis

Author_Institution :

Georgia Tech

fYear :

2004

fDate :

6/26/1905 12:00:00 AM

Keywords :

"Integrated circuit interconnections","Delay effects","Crosstalk","Very large scale integration","Repeaters","Parameter extraction","Circuit simulation","Geometry","Solid modeling","Dielectric devices"

Publisher :

ieee

Conference_Titel :

Quality Electronic Design, 2004. Proceedings. 5th International Symposium on

Print_ISBN :

0-7695-2093-6

Type :

conf

DOI :

10.1109/ISQED.2004.1283637

Filename :

1283637

Link To Document :

https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=3615183