VLSI circuit partition using simulated annealing algorithm

In this work the two way partitioning of a circuit represents as a graph, was made using simulated annealing procedure. The parameters used in annealing process: initial temperature, cooling rate and the time of a process, given as a number of calculations, are changed and its influence on the cost function (number of nets cut by partition) are described. With a proper choice of the initial temperature and the cooling rate we can obtain a good, not necessarily the best solution, not spending too much time to find it out. Procedure was tested on an example with a 1000 components connected by 300 nets. We conclude that all parameters depend on the circuit itself (its size and number of interconnections).