DocumentCode
3617388
Title
Timed automata approach to real time distributed system verification
Author
J. Krakora;L. Waszniowski;P. Pisa;Z. Hanzalek
Author_Institution
Dept. of Control Eng., Czech Tech. Univ., Prague, Czech Republic
fYear
2004
fDate
6/26/1905 12:00:00 AM
Firstpage
407
Lastpage
410
Abstract
This article deals with a distributed real-time application modelling by timed automata. The application under consideration consists of several processors communicating via controller area network (CAN): each processor executes an application that consists of tasks running under an operating system (e.g. OSEK) and using inter-task synchronization primitives. For such system, model checking algorithm implemented in a model checking tool (e.g. UPAALL) can be used to verify complex time and logical properties of the proposed model (e.g. end-to-end response time, state reachability, deadlock freeness). Since the proposed timed automata model contains more crucial details of the system behavior with respect to classical approaches to the response time analysis, the model checking approach provides less pessimistic results in many cases.
Keywords
"Automata","Real time systems","Automatic control","Delay","Operating systems","Communication system control","System recovery","Control system synthesis","Distributed control","Processor scheduling"
Publisher
ieee
Conference_Titel
Factory Communication Systems, 2004. Proceedings. 2004 IEEE International Workshop on
Print_ISBN
0-7803-8734-1
Type
conf
DOI
10.1109/WFCS.2004.1377759
Filename
1377759
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