• DocumentCode
    3619494
  • Title

    Robust Design of Threshold Logic Circuits Using Neuron MOS Transistors

  • Author

    A. Luck;R. Thewes;K. Goser;W. Weber

  • Author_Institution
    Siemens AG, Munich, Germany
  • fYear
    1998
  • fDate
    6/20/1905 12:00:00 AM
  • Firstpage
    592
  • Lastpage
    595
  • Keywords
    "Robustness","Logic circuits","Neurons","MOSFETs","Capacitance","Logic devices","Equations","Logic design","Threshold voltage","Logic gates"
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Device Research Conference, 1998. Proceeding of the 28th European
  • Print_ISBN
    2-86332-234-6
  • Type

    conf

  • Filename
    1503621
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3619494