مرکز منطقه ای اطلاع رساني علوم و فناوري - Investigation of Performance Improvement and Gate-to-junction Leakage Reduction for the 90nm CMOS Gate Stack Architecture

DocumentCode :

3619551

Title :

Investigation of Performance Improvement and Gate-to-junction Leakage Reduction for the 90nm CMOS Gate Stack Architecture

Author :

K. Henson;S. Kubicek;A. Redolfi;K. De Meyer;M. Jurczak;E. Augendre

Author_Institution :

IMEC, Leuven, Belgium

fYear :

2002

fDate :

6/24/1905 12:00:00 AM

Firstpage :

563

Lastpage :

566

Keywords :

"MOS devices","Oxidation","Electrodes","Amorphous materials","Implants","MOSFETs","Inverters","High K dielectric materials","Gate leakage","Furnaces"

Publisher :

ieee

Conference_Titel :

Solid-State Device Research Conference, 2002. Proceeding of the 32nd European

Print_ISBN :

88-900847-8-2

Type :

conf

DOI :

10.1109/ESSDERC.2002.194993

Filename :

1503923

Link To Document :