DocumentCode
3620630
Title
CMOS scaling and three-dimensional silicon integration
Author
P. Jansen;L. Starr
fYear
2005
fDate
6/27/1905 12:00:00 AM
Firstpage
652
Lastpage
653
Keywords
"Silicon","Circuits","CMOS technology","Packaging","Paper technology","Crosstalk","Isolation technology","Capacitive sensors","Stress","High performance computing"
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE 2005
Print_ISBN
0-7803-9023-7
Type
conf
DOI
10.1109/CICC.2005.1568755
Filename
1568755
Link To Document