3620630

CMOS scaling and three-dimensional silicon integration

P. Jansen;L. Starr

2005

6/27/1905 12:00:00 AM

652

653

"Silicon","Circuits","CMOS technology","Packaging","Paper technology","Crosstalk","Isolation technology","Capacitive sensors","Stress","High performance computing"

ieee

Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE 2005

0-7803-9023-7

conf

10.1109/CICC.2005.1568755

1568755