DocumentCode :
3621556
Title :
Modeling and simulation transport in advanced planar cmos devices
Author :
E. Sangiorgi;M. Staedele
fYear :
2005
fDate :
6/27/1905 12:00:00 AM
Firstpage :
596
Lastpage :
596
Keywords :
"Semiconductor device modeling","Material properties","CMOS technology","Microscopy","Laboratories","High-K gate dielectrics","Ballistic transport","Capacitance","Performance analysis","Tunneling"
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International
Print_ISBN :
0-7803-9268-X
Type :
conf
DOI :
10.1109/IEDM.2005.1609419
Filename :
1609419
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=3621556
