Design, Functionality And Testability Of A Multichannel Asic For Digital X-ray Imaging

This paper presents the design and results of first measurements of a fast binary readout architecture ASIC aimed for digital X-ray imaging. The ASIC called DEDIX includes 64 readout channels, a number of DACs for different bias and threshold settings, voltage reference, temperature sensor circuit, calibration circuit, I/O circuit and a control logic circuit. Each readout channel consists of charge amplifier, PZC circuit, shaper, two discriminators and two 20-bit counters. The DEDIX is supposed to work in relatively complex systems featuring several hundred detector channels. For this reason particular attention was paid to general system solutions and the circuit testability. This paper is essentially dedicated to these aspects of DEDIX operation. The circuit was implemented in a 3.3 V 0.35 mum CMOS technology. First tests confirm full functionality of the ASIC