• DocumentCode
    3622675
  • Title

    Si Circuits Design Automation Using Ample Language

  • Author

    P. Sniatala;R. Rudnicki

  • Author_Institution
    Poznan Univ. of Technol.
  • fYear
    2006
  • fDate
    6/28/1905 12:00:00 AM
  • Firstpage
    383
  • Lastpage
    386
  • Abstract
    This paper presents AMPLE language utilization for a layout generation. A current mirror generator is described. Next, the proposed solution is presented as a part of a design flow for SI circuits. Another tool improving the design - Current Mirror Maker is also presented. This tool calculates transistors´ sizes, which fulfil the given requirements of the circuit for the desired technology. The whole approach was practically verified during the design of fabricated testing chip
  • Keywords
    "Circuit synthesis","Design automation","Mirrors","Layout","Filters","Coordinate measuring machines","Digital circuits","Signal design","CMOS technology","System-on-a-chip"
  • Publisher
    ieee
  • Conference_Titel
    Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006. Proceedings of the International Conference
  • Print_ISBN
    83-922632-2-7
  • Type

    conf

  • DOI
    10.1109/MIXDES.2006.1706604
  • Filename
    1706604
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3622675