DocumentCode
3623006
Title
On reducing the dataflow-graph hosting area
Author
B. Robic;J. Silc;P. Blaznik;P. Kolbezen
Author_Institution
Dept. of Comput. Sci., Jozef Stefan Inst., Ljubljana, Yugoslavia
fYear
1991
fDate
6/13/1905 12:00:00 AM
Firstpage
138
Lastpage
142
Abstract
An examination is made of the problem of mapping a dataflow program graph onto a data-driven processor array with hexagonal cells. A particular mapping scheme is analyzed to show that, in general, it results in a low area utilization. An optimization method for reducing the hosting area is introduced with descriptions of two possible implementations.
Keywords
"Optimization methods","Very large scale integration","Computer science","Electronic mail","Routing","Fault tolerance","Testing","Joining processes","Computer architecture","Parallel processing"
Publisher
ieee
Conference_Titel
CompEuro ´91. Advanced Computer Technology, Reliable Systems and Applications. 5th Annual European Computer Conference. Proceedings.
Print_ISBN
0-8186-2141-9
Type
conf
DOI
10.1109/CMPEUR.1991.257371
Filename
257371
Link To Document