DocumentCode :
3623009
Title :
Implementation of fast radix-4 division with operands scaling
Author :
M.D. Ercegovac;T. Lang;R. Modiri
Author_Institution :
Dept. of Comput. Sci., California Univ., Los Angeles, CA, USA
fYear :
1988
fDate :
6/10/1905 12:00:00 AM
Firstpage :
486
Lastpage :
489
Abstract :
A radix-4 divider can potentially achieve a speedup of two with respect to a radix-2 implementation by halving the number of steps. However, the complicated quotient-digit selection function increases the critical path and almost eliminates the speedup. The authors present an implementation of a scheme that scales the divisor close to unity, making the quotient-selection function independent of the divisor. They show a gate-array implementation that achieves a speedup of 1.5 with respect to the radix-2 case, doubling the number of gates. The speedup achieved is still considerably lower than the theoretical maximum of twice.
Keywords :
Computer science
Publisher :
ieee
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1988. ICCD ´88., Proceedings of the 1988 IEEE International Conference on
Print_ISBN :
0-8186-0872-2
Type :
conf
DOI :
10.1109/ICCD.1988.25748
Filename :
25748
Link To Document :
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