High-level modelling of an adaptive echo canceller and finite wordlength effects on its performances

Full-duplex data transmission in voice band over two-wire general switched telephone networks requires echo cancellation to achieve the channel separation. Because of very strict demands about echo cancellation, an echo canceller should be designed very carefully. Prior to starting with the actual design of a chip, the selected architecture should be simulated with real signals to determine all parameters of the canceller. We describe the high-level modelling and simulation of the echo canceller with COMDISCO system simulation software. The canceller was simulated with floating-point arithmetic to establish its efficiency and then with fixed-point arithmetic to determine the actual number of bits needed for the implementation on a VLSI chip. During the simulation, we also investigated the influence of the finite wordlength on canceller´s performance.