• DocumentCode
    3623566
  • Title

    Piecewise linear macromodels for elementary logic and fuzzy circuits

  • Author

    I.C. Tesu;F. Dartu

  • Author_Institution
    Fac. of Electron., Iasi Polytech. Inst., Romania
  • fYear
    1993
  • Firstpage
    1718
  • Abstract
    Based on a vector sorting method using piecewise linear (PWL) techniques, a piecewise linear representation for elementary logic and fuzzy circuits is derived. A modeling technique and a PWL representation for elementary logic gates (AND/NAND/OR/NOR) and fuzzy circuits (min(x), max(x)) are presented. It is shown that the authors´ models, which are simple in nature, accurately describe the DC transfer characteristics of the emitter-coupled logic (ECL) logic circuits.
  • Keywords
    "Fuzzy logic","Piecewise linear techniques","Logic circuits","Circuit simulation","Sorting","Vectors","Analytical models","Logic gates","Complexity theory","Central Processing Unit"
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1993., ISCAS ´93, 1993 IEEE International Symposium on
  • Print_ISBN
    0-7803-1281-3
  • Type

    conf

  • DOI
    10.1109/ISCAS.1993.394074
  • Filename
    394074