DocumentCode
3623710
Title
Error Floors of LDPC Codes on the Binary Symmetric Channel
Author
Shashi Kiran Chilappagari;Sundararajan Sankaranarayanan;Bane Vasic
Author_Institution
Electrical and Computer Engineering Department, University of Arizona, 1230 E. Speedway Blvd., Tucson, AZ 85721. e-mail: shashic@ece.arizona.edu
Volume
3
fYear
2006
fDate
6/1/2006 12:00:00 AM
Firstpage
1089
Lastpage
1094
Abstract
In this paper, we propose a semi-analytical method to compute error floors of LDPC codes on the binary symmetric channel decoded iteratively using the Gallager B algorithm. The error events of the decoder are characterized using combinatorial objects called trapping sets, originally defined by Richardson. In general, trapping sets are characteristic of the graphical representation of a code. We study the structure of trapping sets and explore their relation to graph parameters such as girth and vertex degrees. Using the proposed method, we compute error floors of regular structured and random LDPC codes with column weight three.
Keywords
"Parity check codes","Iterative decoding","Computer errors","AWGN","Iterative algorithms","Error analysis","Signal to noise ratio","Degradation","Additive white noise","Bipartite graph"
Publisher
ieee
Conference_Titel
Communications, 2006. ICC ´06. IEEE International Conference on
ISSN
1550-3607
Electronic_ISBN
1938-1883
Type
conf
DOI
10.1109/ICC.2006.254892
Filename
4024284
Link To Document