• DocumentCode
    3624063
  • Title

    Measurements and analysis of process variability in 90nm CMOS

  • Author

    Borivoje Nikolic;Liang-teck Pang

  • Author_Institution
    Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA
  • fYear
    2006
  • Firstpage
    505
  • Lastpage
    508
  • Abstract
    Process variability in deeply scaled CMOS has both random and systematic components, with a varying degree of spatial correlation. A test chip has been built to study the effects of circuit layout on variability of delay and power dissipation in 90nm CMOS. The delay is characterized through the spread of ring oscillator frequencies and the transistor leakage is measured by using an on-chip ADC
  • Keywords
    "CMOS process","Optical scattering","Semiconductor device measurement","Lenses","Resists","Circuit testing","Frequency measurement","Fluctuations","Lithography","Focusing"
  • Publisher
    ieee
  • Conference_Titel
    Solid-State and Integrated Circuit Technology, 2006. ICSICT ´06. 8th International Conference on
  • Print_ISBN
    1-4244-0160-7
  • Type

    conf

  • DOI
    10.1109/ICSICT.2006.306337
  • Filename
    4098150
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3624063