Impact of copper contacts on CMOS front-end yield and reliability

With copper contact technology, CMOS front-end yield and reliability are governed by the quality of the contact barrier stack. Poor barrier quality gives rise to yield loss in junctions and gate dielectrics, and reduced time-to-breakdown with characteristic breakdown signature. Failure analysis reveals the presence of copper silicide as the underlying cause, its impact depending on the exact location of the affected region. With optimized barrier there is no indication for copper related front-end yield and reliability problems