Testing of Hybrid Real-time Systems Using FPGA Platform

This paper presents a hybrid hardware-in-the-loop (HIL) methodology based on both the discrete event system, given by timed automata, and the continuous systems, given by difference equations. The methodology is implemented using an FPGA platform. It guarantees not only the speed enhancement but also the time accuracy and extensibility with no performance loss. Compared to the operating system based platforms, the FPGA platform is able to achieve much faster sampling frequency. Methodology FPGA implementation is generated by using Xilinx System Generator, bit exact toolbox for Matlab/Simulink.