• DocumentCode
    3625301
  • Title

    Low-Power Low-Noise Neural Amplifier in 0.18μm FD-SOI Technology

  • Author

    Donghwi Kim;Ridha Kamoua;Milutin Stanacevic

  • Author_Institution
    Department of Electrical and Computer Engineering, Stony Brook University, Stony Brook, New York 11794-2350, USA. Email: dhkim@ece.sunysb.edu
  • fYear
    2007
  • fDate
    5/1/2007 12:00:00 AM
  • Firstpage
    805
  • Lastpage
    808
  • Abstract
    For recording of neural signals from large population of neurons, stringent constraints are imposed on the design of neural amplifiers. We have designed neural amplifier in FD-SOI technology in order to achieve lower power consumption, smaller area, and better noise efficiency factor compared to the standard bulk processes. A symmetric pseudo resistor was realized with resistances on the order of 1015Ω, enabling a low cut-off frequency of 0.6mHz. The designed neural amplifier occupies an area of 0.004mm2, with simulated performance demonstrating an input-referred noise of 3.07μVrms and a power consumption of 6μW.
  • Keywords
    "Low-noise amplifiers","Voltage","Immune system","Cutoff frequency","MOSFETs","Resistors","CMOS technology","Energy consumption","Circuit noise","Operational amplifiers"
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
  • ISSN
    0271-4302
  • Print_ISBN
    1-4244-0920-9
  • Electronic_ISBN
    2158-1525
  • Type

    conf

  • DOI
    10.1109/ISCAS.2007.378008
  • Filename
    4252757