DocumentCode
3625561
Title
Design of the Multicast Controller for the High-Capacity Internet Router
Author
Milos Blagojevic;Aleksandra Smiljanic;Milos Petrovic
Author_Institution
Belgrade University, Belgrade, Serbia. milosdb@etf.bg.ac.yu
fYear
2007
fDate
5/1/2007 12:00:00 AM
Firstpage
1
Lastpage
6
Abstract
High-capacity routers that circulate multicast packets have unique properties. Their architecture is non-blocking even for the multicast traffic. It also provides delay guarantees. This paper presents the detailed implementation of the controller that circulates multicast packets through a router toward their destination ports. The controller was implemented on the FPGA device and its functioning was tested. Its scalability and speed were assessed, and shown to be satisfactory.
Keywords
"Internet","Traffic control","Delay","Multicast algorithms","Scheduling algorithm","Unicast","Optimal scheduling","Field programmable gate arrays","Testing","Scalability"
Publisher
ieee
Conference_Titel
High Performance Switching and Routing, 2007. HPSR ´07. Workshop on
ISSN
2325-5552
Print_ISBN
1-4244-1205-6
Electronic_ISBN
2325-5560
Type
conf
DOI
10.1109/HPSR.2007.4281247
Filename
4281247
Link To Document