DocumentCode :
3625663
Title :
Programmable Hardware Implementation Based on Four Walsh Sequences
Author :
B. J. Falkowski;T. Sasao;T. Luba
Author_Institution :
NANYANG TECHNOLOGICAL UNIVERSITY, SINGAPORE
fYear :
2007
fDate :
6/1/2007 12:00:00 AM
Firstpage :
135
Lastpage :
140
Abstract :
This article shows an algorithm to generate Walsh functions in four different orderings: Hadamard, Harmuth, Paley and strict sequency. The properties and mutual relations among these four orderings are analyzed and a method is developed that allows any of the orderings to be generated from the primary set of Rademacher functions. Finally, a programmable Walsh function generator for 64 outputs is implemented using both field programmable gate arrays (FPGAs) and lookup table (LUT) cascades to estimate the amount of hardware and performance. Such a programmable Walsh function generator can be used in VLSI testing, CDMA, pattern recognition as well as image and signal processing.
Keywords :
"Hardware","Signal generators","Field programmable gate arrays","Table lookup","Signal processing algorithms","Very large scale integration","Testing","Multiaccess communication","Pattern recognition","Array signal processing"
Publisher :
ieee
Conference_Titel :
Mixed Design of Integrated Circuits and Systems, 2007. MIXDES ´07. 14th International Conference on
Print_ISBN :
83-922632-4-3
Type :
conf
DOI :
10.1109/MIXDES.2007.4286136
Filename :
4286136
Link To Document :
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