Title :
Transition Faults Testing Based on Functional Delay Tests
Author :
Eduardas Bareisa;Vacius Jusas;Kestutis Motiejunas;Rimantas Seinauskas
Author_Institution :
Software Engineering Department, Kaunas University of Technology, Student? 50-406., LT-51368 Kaunas, Lithuania
fDate :
4/1/2007 12:00:00 AM
Abstract :
Rapid advances of semiconductor technology lead to higher circuit integration as well as higher operating frequencies. The statistical variations of the parameters during the manufacturing process as well as physical defects in integrated circuits can sometimes degrade circuit performance without altering its logic functionality. These faults are called delay faults. In this paper we consider the quality of the tests generated for two types of delay faults, namely, functional delay and transition faults. We compared the test quality of functional delay tests in regard to transition faults and vice versa. We have performed various comprehensive experiments with combinational benchmark circuits. The experiments exhibit that the test sets, which are generated according to the functional delay fault model, obtain high fault coverages of transition faults. However, the functional delay fault coverages of the test sets targeted for the transition faults are low. It is very likely that the test vectors based on the functional delay fault model can cover other kinds of the faults. Another advantage of test set generated at the functional level is that it is independent of and effective for any implementation and, therefore, can be generated at early stages of the design process.
Keywords :
"Delay","Circuit faults","Circuit testing","Integrated circuit technology","Lead compounds","Frequency","Manufacturing processes","Degradation","Circuit optimization","Logic circuits"
Conference_Titel :
Design and Diagnostics of Electronic Circuits and Systems, 2007. DDECS ´07. IEEE
Print_ISBN :
1-4244-1161-0
DOI :
10.1109/DDECS.2007.4295315