DocumentCode
36263
Title
Kernel-to-User-Mode Transition-Aware Hardware Scheduling
Author
Markovic, Nikola ; Nemirovsky, Daniel ; Unsal, Osman ; Valero, Mateo ; Cristal, Adrian
Volume
35
Issue
4
fYear
2015
fDate
July-Aug. 2015
Firstpage
37
Lastpage
47
Abstract
As thread-level parallelism in applications has continued to expand, so has research in chip multicore processors. More and more applications are becoming multithreaded, which should lead to a growing number of threads executing on a machine. Consequentially, the operating system will require increasingly larger amounts of CPU time to schedule these threads efficiently. Instead of perpetuating the trend of performing more-complex thread scheduling in the OS, the authors propose a scheduling mechanism that can be efficiently implemented in hardware as well. Their approach of identifying multithreaded application bottlenecks such as thread synchronization sections complements the fairness-aware scheduler method. It achieves average speedup of 11.1 and 30 percent (geometric mean) compared to the state-of-the-art Fairness-Aware Scheduler and Linux OS scheduler, respectively, while being 8 percent slower compared to the state-of-the-art bottleneck identification techniques.
Keywords
Linux; multi-threading; multiprocessing systems; operating system kernels; processor scheduling; CPU time; Linux OS scheduler; chip multicore processor; fairness-aware scheduler method; kernel-to-user-mode transition-aware hardware scheduling; multithreaded application; multithreading; operating system; scheduling mechanism; thread scheduling; thread synchronization section; thread-level parallelism; Computer programs; Context modeling; Hardware; Instruction sets; Multicore processing; Processor scheduling; ACMP; asymmetric chip multiprocessor; hardware/software thread scheduling; multithreaded applications;
fLanguage
English
Journal_Title
Micro, IEEE
Publisher
ieee
ISSN
0272-1732
Type
jour
DOI
10.1109/MM.2015.80
Filename
7182246
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