26 kbit Two Transistor Low Voltage/Low Power NOR Charge Trapping Flash Memory with HfSiON and TiN Metal gate

In this paper, the 2T NOR CTNVM with HfSiON and TiN metal gate has been investigated using 128 bit and 26 kbit array vehicles, which are programmed/erased by direct tunnelling of electrons/holes from the Si channel. It has been demonstrated that with programme/erase (P/E) voltages as low as plusmn10 V, a threshold voltage (V_T) window in excess of 4V can be achieved with 1 ms - 10 ms pluses, combined with an excellent endurance up to 10 P/E cycles and a good room temperature retention.