Innovative High Voltage transistors for complex HV/RF SoCs in baseline CMOS

Trends in portable applications lead to integration of power management, power amplification and RF functionality in a single chip using the most advanced CMOS technology. The required HV transistors should be strictly realized in baseline CMOS to guarantee cost competitiveness and short time-to-market. This paper advocates innovative transistor architectures based on smart layout to address this challenge in both bulk and PD-SOI sub-100 nm CMOS.