Controllable Local Clock Signal Generator for Deep Submicron GALS Architectures

In the paper a local clock signal generator is presented. The structure was designed in regard to use it in GALS (Globally Asynchronous Locally Synchronous) architectures. The circuit was implemented in UMC (United Microelectronics Corporation) 90 nm CMOS technology. Performed post-layout electrical simulations shown that generated frequency can be efficiently controlled in different working conditions with relative error not grater than 13%.