Implementation of polyphase-FFT based channelizer on FPGA

In this paper a channelizer implementation is performed on FPGA by first a demonstration through simulation and then by applying real test signals. In this study, polyphase FFT based method is selected as the channelization method. The wideband signal, with the bandwidth of 50 MHz, is sampled by 105 MHz and divided into 64 channels with the channel spacing of 0.82 MHz while each one has a sampling frequency of 1.64 MHz and complex outputs. The filter that discriminates between channels has a bandwidth of 1 MHz which allows a certain degree of interference between the adjacent channels, enabling the derivation of signals existing at the intersection area of these channels. In order to realize this, two times oversampling is used for each channel. The design is first simulated in MATLAB environment, and then coded in VHDL and simulated in ModelSim environment. After simulations, the design is synthesized in Xilinx-ISE and loaded to the development board with Virtex-4SX35 FPGA on it, for further testing with real signals.