CMOS temperature sensor using periodic averaging for error reduction

A fully integrated temperature sensor is implemented in a 0.35 μm CMOS technology. Sensor can measure the temperature with maximum inaccuracy of ±0.56 °C (3σ) over temperature range of −40 °C to +85 °C. Parasitic substrate pnp transistors are used for temperature sensing. Dynamic element matching (DEM) technique is used to reduce the effect of matching errors of components. An on-chip clock source, control logic, low-pass filter and an output buffer ared added to the PTAT sensor core. Further spread of components is decreased by using one point gain calibration at package level. The total power consumption of the sensor is 374 μW and the active chip area is 0.64 mm².