Optimisation of applications for FPGAs with PowerPC processor using priced timed automata

Some digital signal processing applications can be executed faster by moving parts of application implementation into hardware. Platforms, like Xilinx Virtex-4 4VFX12, allow a user to run software in embedded processor and offload computations to the set of hardware modules. The article deals with optimal schedule synthesis techniques for tasks executed on such platform using priced timed automata and UPPAAL CORA tool. It shows a schedule synthesis techniques minimising makespan or sum of completion times criterion. Moreover, it presents a synthesis methodology considering a fraction of resource capacity, called resource budget and maximization of processor utilization for tasks with bounded period. Case studies and FPGA experiments are finally presented.