Title :
BIST and delay fault detection
Author :
S. Pilarski;A. Pierzynska
Author_Institution :
Sch. of Comput. Sci., Simon Fraser Univ., Burnaby, BC, Canada
Abstract :
We propose simple modifications to existing BIST schemes. These modifications significantly improve the path delay fault coverage. For example, a modified circular self-test path can detect a significant number of path delay faults within a reasonable test running time.
Keywords :
"Built-in self-test","Fault detection","Circuit faults","Circuit testing","Automatic testing","Test pattern generators","Electrical fault detection","Robustness","Delay effects","Clocks"
Conference_Titel :
Test Conference, 1993. Proceedings., International
Print_ISBN :
0-7803-1430-1
DOI :
10.1109/TEST.1993.470697
