DocumentCode
3631306
Title
A full-custom extensible and compact digital multiplier circuit design
Author
A.C. Negoi
Author_Institution
CNRS, Grenoble, France
fYear
1995
Firstpage
349
Lastpage
352
Abstract
This paper presents a design of an extensible and very compact digital multiplier, made in full-custom. It is characterized by regularity and it is particularly adapted to be used as a part of high-speed digital processors. The design has as a particular feature the short time in which it was developed.
Keywords
"Circuit synthesis","Circuit simulation","Equations","Linear predictive coding","Process design","Arithmetic","Silicon","Delay","Inverters","Logic circuits"
Publisher
ieee
Conference_Titel
Semiconductor Conference, 1995. CAS´95 Proceedings., 1995 International
Print_ISBN
0-7803-2647-4
Type
conf
DOI
10.1109/SMICND.1995.495034
Filename
495034
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