Title :
A full-custom extensible and compact digital multiplier circuit design
Author_Institution :
CNRS, Grenoble, France
Abstract :
This paper presents a design of an extensible and very compact digital multiplier, made in full-custom. It is characterized by regularity and it is particularly adapted to be used as a part of high-speed digital processors. The design has as a particular feature the short time in which it was developed.
Keywords :
"Circuit synthesis","Circuit simulation","Equations","Linear predictive coding","Process design","Arithmetic","Silicon","Delay","Inverters","Logic circuits"
Conference_Titel :
Semiconductor Conference, 1995. CAS´95 Proceedings., 1995 International
Print_ISBN :
0-7803-2647-4
DOI :
10.1109/SMICND.1995.495034