CMOS VLSI realization of voltage-mode programmable analog cellular neural network

A highly efficient Cellular Neural Network (CNN) basic cell circuit containing only one finite gain amplifier is presented. Along with minimization of the layout space used, this cell circuit offers a unique possibility to control (decrease) a network time-constant by changing (increasing) the amplifiers gain only. A full-custom CMOS VLSI realization of this circuit is systematically explained. Based on this cell, a general-purpose CMOS VLSI CNN chip is then realized in 2 /spl mu/m scaleable CMOS technology on the MOSIS Tiny Frame chip. The presented architecture was compared with the known CNN´s for some image-processing applications.