• DocumentCode
    3631839
  • Title

    Generation of high quality tests for functional sensitizable paths

  • Author

    A. Krstic; Kwang-Ting Cheng

  • Author_Institution
    Dept. of Electr. & Comput. Eng., California Univ., Santa Barbara, CA, USA
  • fYear
    1995
  • Firstpage
    374
  • Lastpage
    379
  • Abstract
    Some previously published results show that in a number of combinational circuits a significant portion of long paths is neither robustly nor non-robustly testable. However, not all of those untestable paths may be ignored in delay testing. Functional sensitizable paths are robust and non-robust untestable but, under some faulty conditions, may degrade the performance of the circuit. Even though the need for testing functional sensitizable paths was recognized in previous research, up till now, there was no strategy for generating tests for them. In this paper we present an algorithm for generating high quality tests for functional sensitizable paths based on including the timing information into the process of test derivation. Our experimental results prove that the quality of delay testing increases if additional test vectors for functional sensitizable path delay faults are included.
  • Keywords
    "Circuit testing","Circuit faults","Delay","Robustness","Timing","Electrical fault detection","Fault detection","Degradation","Combinational circuits","Clocks"
  • Publisher
    ieee
  • Conference_Titel
    VLSI Test Symposium, 1995. Proceedings., 13th IEEE
  • ISSN
    1093-0167
  • Print_ISBN
    0-8186-7000-2
  • Type

    conf

  • DOI
    10.1109/VTEST.1995.512663
  • Filename
    512663