DocumentCode :
3632726
Title :
Integral Parallel Architecture & Berkeley´s Motifs
Author :
Mihaela Malita;Gheorghe Stefan
Author_Institution :
St. Anselm Coll., Manchester, OH, USA
fYear :
2009
Firstpage :
191
Lastpage :
194
Abstract :
The Integral Parallel Architecture (IPA) developed and actually implemented by BrightScale is a low-power(133 GOPS/Watt) & low-area (8 GOPS/mm^2) one-chip solution to solve intense computational problems using data-parallel, time-parallel and speculative-parallel mechanisms. BrightScale technology is presented from the point of view of each of the 13 motifs proposed in The Berkeley´s View. IPA emerges from Kleene´s computational model of the partial recursive functions as the simplest parallel architecture, a good starting point for a true science of parallel computation. We briefly investigate how such an elementary parallel architecture performs, for the main computational motifs, in solving the problems of programmability, portability, flexibility, data movement between computational cells, and between cells and the main memory.
Keywords :
Parallel architectures
Publisher :
ieee
Conference_Titel :
Application-specific Systems, Architectures and Processors, 2009. ASAP 2009. 20th IEEE International Conference on
ISSN :
1063-6862
Type :
conf
DOI :
10.1109/ASAP.2009.40
Filename :
5200028
Link To Document :
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