Title :
Processor architecture model for fuzzy control
Author :
D. Basch;M. Zagar
Author_Institution :
Dept. of Control & Comput. Eng. in Autom., Zagreb Univ., Croatia
Abstract :
In this paper, the architecture of a fuzzy processor intended for high-speed control applications is described. Its main advantage is the inference speed that does not depend on the number of used inputs and rules. This is accomplished by the usage of content addressable memory as a rule set storage. The proposed architecture was simulated and the simulation results give the inference speed of about 200 KFLIPS.
Keywords :
"Fuzzy control","Computer architecture","Process control","Application software","Microprocessors","Fuzzy logic","Fuzzy sets","Control engineering computing","Associative memory","Packaging"
Conference_Titel :
Intelligent Control, 1995., Proceedings of the 1995 IEEE International Symposium on
Print_ISBN :
0-7803-2722-5
DOI :
10.1109/ISIC.1995.525058