DocumentCode :
3633234
Title :
Multigigabit network traffic processing
Author :
Jiri Halak
Author_Institution :
CESNET, Czech Republic
fYear :
2009
Firstpage :
521
Lastpage :
524
Abstract :
High-speed (10 Gb/s and above) network monitoring and traffic processing requires hardware acceleration. Different applications require different functions to be placed in hardware. This paper presents the architecture and platform for processing network packets at speed of 10 Gb/s. The platform can process the packets at full speed without a packet drop and is easily extendable by plug-in modules that can be changed without the need of shutting down the entire platform.
Keywords :
"Telecommunication traffic","Hardware","Clocks","Field programmable gate arrays","Rockets","Global Positioning System","Cyclic redundancy check","Wires","Ethernet networks","Linux"
Publisher :
ieee
Conference_Titel :
Field Programmable Logic and Applications, 2009. FPL 2009. International Conference on
ISSN :
1946-147X
Electronic_ISBN :
1946-1488
Type :
conf
DOI :
10.1109/FPL.2009.5272439
Filename :
5272439
Link To Document :
بازگشت