DocumentCode :
3633265
Title :
Faults classification in analog electronic circuits with use of the SVM algorithm
Author :
Damian Grzechca;Slawomir Czeczotka
Author_Institution :
Institute of Electronics Silesian University of Technology Gliwice, Poland
fYear :
2009
Firstpage :
659
Lastpage :
662
Abstract :
In the paper the application of the SVM (Support Vector Machine) algorithm has been used for diagnosis and test of analog electronic circuits in time domain. Procedure designed belongs to simulation before test technique, where the fault models should be assumed at the before test stage (prototype stage). Both, parametric and catastrophic faults based on standard fault models are considered. Selected features from transient domain are classified at the after test stage with use of decision function, which has been designed by SVM algorithm. An exemplary benchmark has been tested and the results prove high classification ability of the SVM application.
Keywords :
"Circuit faults","Electronic circuits","Support vector machines","Support vector machine classification","Circuit testing","Electronic equipment testing","Circuit simulation","Virtual prototyping","Algorithm design and analysis","Benchmark testing"
Publisher :
ieee
Conference_Titel :
Circuit Theory and Design, 2009. ECCTD 2009. European Conference on
Type :
conf
DOI :
10.1109/ECCTD.2009.5275061
Filename :
5275061
Link To Document :
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