DocumentCode :
3633916
Title :
Bulk-Si FinFET technology for ultra-high aspect-ratio devices
Author :
Vladimir Jovanovic;Lis K. Nanver;Tomislav Suligoj;Mirko Poljak
Author_Institution :
DIMES, Delft University of Technology, Feldmannweg 17, 2628 CT, The Netherlands
fYear :
2009
Firstpage :
241
Lastpage :
244
Abstract :
FinFETs with 1 µm tall fins have been processed on (110) bulk silicon wafers using crystallographic etching of silicon by TMAH to form fins with nearly vertical sidewalls of an (111) surface orientation. The concept of tall, narrow fins offers more efficient use of silicon area and better performance of multi-fin devices in high-frequency analog applications. N-channel FinFETs with 1.9-nm-wide fins and a height of the active part of the fin up to 650 nm have been fabricated and demonstrate the scaling potentials of the proposed technology. This extreme reduction of the fin width degrades electron mobility as compared to devices with 15-nm-wide fins, which have been used here to investigate the current conduction capability of FinFETs with (111) sidewalls.
Keywords :
"FinFETs","Silicon","Etching","Doping","Crystallography","Electrostatics","Anisotropic magnetoresistance","Degradation","Electron mobility","Tunneling"
Publisher :
ieee
Conference_Titel :
Solid State Device Research Conference, 2009. ESSDERC ´09. Proceedings of the European
ISSN :
1930-8876
Print_ISBN :
978-1-4244-4351-2
Electronic_ISBN :
2378-6558
Type :
conf
DOI :
10.1109/ESSDERC.2009.5331554
Filename :
5331554
Link To Document :
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