DocumentCode
3634176
Title
Designing manycore processor networks using silicon photonics
Author
Ajay Joshi;Christopher Batten;Yong-Jin Kwon;Scott Beamer;Imran Shamim;Krste Asanović;Vladimir Stojanović
Author_Institution
Department of EECS, Massachusetts Institute of Technology, Cambridge, USA
fYear
2009
Firstpage
16
Lastpage
17
Abstract
We present a vertical integration approach for designing silicon photonic networks for communication in manycore systems. Using a top-down approach we project the photonic device requirements for a 64-tile system designed in 22 nm technology.
Keywords
"Process design","Silicon","Photonics","Optical losses","Bandwidth","Optical waveguides","Laser tuning","Optical tuning","Circuit optimization","CMOS technology"
Publisher
ieee
Conference_Titel
LEOS Annual Meeting Conference Proceedings, 2009. LEOS ´09. IEEE
ISSN
1092-8081
Print_ISBN
978-1-4244-3680-4
Type
conf
DOI
10.1109/LEOS.2009.5343493
Filename
5343493
Link To Document