• DocumentCode
    3634841
  • Title

    Low power current mode pipelined A/D converter with 2.5-bit/stage and digital correction

  • Author

    Krzysztof Wawryn;Robert Suszynski;Bogdan Strzeszewski

  • Author_Institution
    Faculty of Electronics and Information Science, Koszalin University of Technology, ul. ?niadeckich 2, 75-453, Poland
  • fYear
    2009
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    This paper presents a novel prototype low power current mode 9-bit pipelined A/D converter. The A/D converter structure is composed of three 2.5-bit and one 3 bit stages operating in current mode and final comparator which converts the analog current signal into digital voltage signal. All building blocks of the converter have been designed in CMOS AMS 0.35 ?m technology, then simulated, fabricated and measured to verify proposed concept. The performances of the converter are compared to performances of known voltage mode SC and current mode SI converter structures. Low power consumption and small chip area are advantages of the proposed converter.
  • Keywords
    "Voltage","CMOS technology","Energy consumption","Switching converters","Circuits","Prototypes","Analog-digital conversion","Capacitors","Redundancy","Information science"
  • Publisher
    ieee
  • Conference_Titel
    Integrated Circuits, ISIC ´09. Proceedings of the 2009 12th International Symposium on
  • ISSN
    2325-0631
  • Print_ISBN
    978-9-8108-2468-6
  • Type

    conf

  • Filename
    5403972