DocumentCode
3634981
Title
CMOS photonic processor-memory networks
Author
Vladimir Stojanović;Ajay Joshi;Cristopher Batten;Yong-Jin Kwon;Scott Beamer;Sun Chen;Krste Asanović
Author_Institution
Massachusetts Institute of Technology, 77 Massachusetts Ave, Cambridge, Massachusetts 02139
fYear
2010
Firstpage
118
Lastpage
119
Abstract
This paper presents a monolithically integrated dense WDM photonic network for manycore processors, optimized for loss and power footprint of optical components, which can achieve up to 10x better energy-efficiency and throughput than electrical interconnects.
Keywords
"CMOS process","Optical interconnections","Integrated circuit interconnections","Optical devices","Energy efficiency","Bandwidth","Optical buffering","CMOS technology","Photonic integrated circuits","Optical losses"
Publisher
ieee
Conference_Titel
Photonics Society Winter Topicals Meeting Series (WTM), 2010 IEEE
Print_ISBN
978-1-4244-5240-8
Type
conf
DOI
10.1109/PHOTWTM.2010.5421931
Filename
5421931
Link To Document