DocumentCode :
3635603
Title :
Manufacturability of low power CMOS technology solutions
Author :
A.J. Strojwas;M. Quarantelli;J. Borel;C. Guardiani;G. Nicollini;G. Crisenza;B. Franzini
Author_Institution :
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
fYear :
1996
Firstpage :
225
Lastpage :
232
Abstract :
This paper discusses manufacturability of state-of-the-art low power technologies. We report the results on two generations of bulk CMOS technologies, triple-well CMOS and Thin Film Silicon on Insulator (TFSOI) technologies. We present technology capabilities for several values of supply voltage and address the issue of performance scaling with the supply voltage reduction. Then we focus on the statistical characterization of these technologies and discuss both interchip and intrachip variations. Finally, we present the digital and analog designer perspectives on the low power IC operation.
Keywords :
"CMOS technology","Manufacturing","Silicon on insulator technology","Power dissipation","Dynamic voltage scaling","Capacitance","Circuits","Threshold voltage","Microelectronics","Research and development"
Publisher :
ieee
Conference_Titel :
Low Power Electronics and Design, 1996., International Symposium on
Print_ISBN :
0-7803-3571-6
Type :
conf
DOI :
10.1109/LPE.1996.547513
Filename :
547513
Link To Document :
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