DocumentCode
3636124
Title
Reconfigurable hardware objects for image processing on FPGAs
Author
Jan Kloub;Petr Honzík;Martin Daněk
Author_Institution
Institute of Information Theory and Automation of ASCR, Pod Vodarenskou vez 4, 182 08 Praha 8, Czech Republic
fYear
2010
fDate
4/1/2010 12:00:00 AM
Firstpage
121
Lastpage
122
Abstract
Embedded systems are getting more complex; that is why the high level of abstraction is required during the development process. High abstraction methods simplify implementation of complex computation systems and shorten the time to market. This paper presents an implementation of a graphic computing element (GCE) which can be used as a runtime parametrized building block in image processing applications in FPGAs. In terms of the object oriented model GCE encapsulates its internal data representation and rules for their manipulation. Several basic image processing operations have been implemented (Sobel edge detection, Gauss, mean, etc. filtering). These operations are called as GCE methods. Because of high spatial dependency of image data in image processing, an efficient image data reuse method has been implemented.
Keywords
"Hardware","Image processing","Field programmable gate arrays","Embedded system","Time to market","Graphics","Runtime","Object oriented modeling","Image edge detection","Gaussian processes"
Publisher
ieee
Conference_Titel
Design and Diagnostics of Electronic Circuits and Systems (DDECS), 2010 IEEE 13th International Symposium on
Print_ISBN
978-1-4244-6612-2
Type
conf
DOI
10.1109/DDECS.2010.5491805
Filename
5491805
Link To Document