Design of fully differential folded cascode operational amplifier by the gm/ID methodology

This paper presents the design of a fully differential folded cascode operational amplifier by using the gm/ID methodology. The gm/ID curves have been computed for a 0.35-µm CMOS process and the gm/ID methodology is applied to computing the transistor aspect ratios W/L for the specified operational amplifier requirements, such as open-loop gain, unity-gain frequency and slew rate. The output stage is designed to drive a 20-kΩ resistive load. The amplifier performance is simulated over wide process and temperature variations to determine the worst case behaviour.