DocumentCode
3637080
Title
Using QBF to increase accuracy of SAT-based debugging
Author
André Sülflow;Görschwin Fey;Rolf Drechsler
Author_Institution
Institute of Computer Science, University of Bremen, 28359 Bremen, Germany
fYear
2010
Firstpage
641
Lastpage
644
Abstract
Debugging significantly slows down the design process of complex systems. Only limited tool support is available and often fixing one problem leads to finding the next one. Here, we propose an approach that integrates formal verification with diagnosis. The approach is based on Quantified Boolean Formulas (QBF) and ensures, that counterexamples of high quality are returned. Moreover, the diagnosis algorithm only returns fault candidates that can fix all counterexamples. By this, the total number of fault candidates decreases and less iterations between verification and debugging are required.
Keywords
"Debugging","Circuit faults","Fault diagnosis","Process design","Computer science","Formal verification","Automation","Computational efficiency","Computer bugs","Logic"
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Print_ISBN
978-1-4244-5308-5
Type
conf
DOI
10.1109/ISCAS.2010.5537506
Filename
5537506
Link To Document